Skip to main content
Ctrl+K
PyEDB-Core - Home PyEDB-Core - Home
  • Getting started
  • User guide
  • API reference
  • Examples
  • Contribute
Ctrl+K
  • GitHub
Ctrl+K
  • Getting started
  • User guide
  • API reference
  • Examples
  • Contribute
  • GitHub
  • Database
  • Definition
  • Geometry
  • Hierarchy
  • Layers
  • Layout
    • Cell
    • Layout
    • McadModel
    • PowerModule
    • VoltageRegulator
    • CellType
    • DesignMode
      • GENERAL
      • IC
  • Layout instance
  • Nets
  • Primitives
  • Session
  • Simulation setup
  • Terminals
  • Utility
  • Release notes
  • PyAnsys
  • API reference
  • Layout
  • DesignMode

DesignMode#

class ansys.edb.core.layout.cell.DesignMode(value)#

Provides an enum representing design modes.

Attributes

DesignMode.GENERAL

DesignMode.IC

On this page
  • DesignMode
Edit on GitHub
  • Show Source

© Copyright (c) 2025 ANSYS, Inc. All rights reserved.

Created using Sphinx 7.2.6.

Built with the Ansys Sphinx Theme 1.4.2.
Last updated on